Unlocking Complexity: Advanced Techniques in Formal Verification | Part 8 — Transcript
Full transcript
- 0:01hey everyone welcome back if you have
- 0:04been following us you know we have been
- 0:06figuring out how to address the design
- 0:08complexity in formal verification we
- 0:10have looked at ways to do parameter
- 0:12reductions abstractions case splitting
- 0:15and so on but honestly when we are
- 0:17dealing with really tricky designs just
- 0:20doing the basics isn't enough the good
- 0:23news is the cat tools we use to do
- 0:25formal are getting better and smarter
- 0:28all the time helping us out in new ways
- 0:31today we are going to talk about some
- 0:33really cool new methods that are on
- 0:36another level so get your pen and paper
- 0:39ready and let's make sense of all this
- 0:41complicated stuff
- 0:43together recapping our progress we have
- 0:46already covered all the items in the
- 0:48green uh which are shown on the left
- 0:50hand side which are basic and
- 0:51intermediate complexity reduction
- 0:53techniques today we will delve into the
- 0:56blue ones which are the first two points
- 0:58in the advanced complexity reduction
- 1:00part the check decomposition and the
- 1:03assume
- 1:06guarantees imagine a whimsicle race
- 1:09between a rabbit and a Toto it's a timed
- 1:12event so here's the twist if neither
- 1:15participant reaches the Finish Line
- 1:17before the timer expires nobody is going
- 1:20to win however if someone does cross the
- 1:23finish line within the alloted time the
- 1:25clock
- 1:26stops now how can we formally verify
- 1:29this this
- 1:30race one straightforward check is to
- 1:33consider what we see on the left hand
- 1:36side that's what um it says race started
- 1:41and eventually either timeout happened
- 1:43or somebody
- 1:44won now in the formal runs let's say
- 1:48this is taking hours to
- 1:49converge and we want to decompose it
- 1:52into multiple smaller
- 1:55checks how can we do that
- 2:06I have broken down this check into two
- 2:08smaller ones as you see on the right
- 2:10hand side the number one and number two
- 2:13the idea is to split the check in such a
- 2:15way that each of these subjects covers
- 2:18more specific scenarios compared to the
- 2:21original case which we see on the left
- 2:23hand
- 2:24side the motivation is to reduce the
- 2:26state space for each of the smaller
- 2:29checks
- 2:30the focus checks are expect this this
- 2:32smaller Focus checks are expected to
- 2:34reach deeper bounds compared to the
- 2:37original check and if we can prove both
- 2:40of the smaller checks individually then
- 2:42it's equalent to proving the original
- 2:45check so in the first smaller check it's
- 2:48saying that the race started and the
- 2:50timeout did not happen then somebody has
- 2:52to
- 2:53win and in the second scenario we are
- 2:56seeing that the race started and nobody
- 2:58won then time out must happen
- 3:02eventually now how does it look uh look
- 3:06like in the real life scenarios that we
- 3:08deal with let's consider a small f with
- 3:12n
- 3:14elements and consider a case where the
- 3:18F4 has only one entry left in it and the
- 3:21right happens at this
- 3:23point so the read pointer is all the way
- 3:26up here in zero and right pointer is in
- 3:322 so if a write happens at this point
- 3:36and then there is no read simultaneous
- 3:38read happening at that cycle then in the
- 3:40next cycle the 54 is supposed to become
- 3:43full the property that I'm going to
- 3:46verify is shown here there is only one
- 3:49entry left in the F4 underscore 1 d
- 3:52means one cycle before and there was a
- 3:56right one cycle before that implies
- 3:59either the fif is going to be full in
- 4:01the current cycle or there was a read in
- 4:04the previous
- 4:05cycle assume that for the time being
- 4:08that this is going to take a long time
- 4:10to converge and we want to decompose it
- 4:12into two smaller ones this is how you
- 4:14can do it let's split the consant into
- 4:17two sections two properties one says
- 4:21there was a read there there is one free
- 4:23entry one cycle before and a right
- 4:26happened at that point one cycle before
- 4:29and there was no read one cycle before
- 4:32that means the 54 is going to be full
- 4:35has to be full at the current
- 4:37cycle so what's the second
- 4:39scenario one free entry one cycle before
- 4:42right is happening one cycle before and
- 4:45in the current cycle it's still not
- 4:47full what does that mean it means that
- 4:50there was a read one cycle
- 4:54before that's all about decomposing
- 4:58checks let look at the second Advanced
- 5:01technique assume
- 5:03guarantee it is a way to ignore the cor
- 5:06of influence of a particular signal or
- 5:08signals and let those signals choose any
- 5:12value based on certain constraints that
- 5:14we
- 5:16provide let's consider a case with uh
- 5:19with a F4 and an
- 5:21FSM the FSM transitions from start to
- 5:25State one when the F4 is empty and state
- 5:29one to state two and the 54 is
- 5:32full the main property that we are
- 5:34interested in is
- 5:37this uh if you look at the antient of
- 5:40this
- 5:41property it says that the state has to
- 5:44be in state
- 5:46two so when does this chick become
- 5:49active so out of reset it will wait for
- 5:53the 54 to become full first empty and
- 5:56then full which is going to take at
- 5:58least 10 Cycles
- 6:00then this property will be evaluated but
- 6:03the interesting thing to not here is
- 6:05that for those n Cycles when the Fifer
- 6:07is getting full do we really care about
- 6:10those end Cycles as far as this property
- 6:12is
- 6:13concerned if if the answer is no then
- 6:16you're essentially wasting those end
- 6:19Cycles how about getting rid of those
- 6:22end
- 6:23Cycles we can use assume guarantee to do
- 6:25that
- 6:31we can tell the tool to ignore the
- 6:34driving logic of the full and empty
- 6:36signals the signals that matter for this
- 6:38FS some of interest to take any
- 6:42value but when we say any value it might
- 6:46introduce some illegal combination of
- 6:48signals or illegal values in this case U
- 6:51if it it's free to choose empty and full
- 6:54uh one at the same time but that's
- 6:56that's incorrect so we want to add some
- 6:58constraints like
- 7:00full means no
- 7:02empty that means full and empty should
- 7:04not be coming together and things like
- 7:07that based on the nature of the signals
- 7:08and the understanding you have of the
- 7:11design now why do we call it assume
- 7:14guarantee it's because first we need to
- 7:17verify this
- 7:18assumption and that part is called
- 7:20guaranteeing the Assumption so we run
- 7:23this property as an assertion and then
- 7:25we verify it first make sure that this
- 7:27passes then after that we ask for
- 7:31running this property we will ask the
- 7:34tool to consider this as an assumption
- 7:37not as an assertion assertion is a check
- 7:39assumption is a
- 7:41constraint or some kind of restriction
- 7:43on whatever signals we are adding
- 7:46assumption
- 7:48on so initially we prove the property or
- 7:53guarantee the property then we assume
- 7:55the property for checking another
- 7:58property that's the key concept of
- 7:59assume guarantee so there are multiple
- 8:02ways to do this um one of the major
- 8:05tools in the industry has something like
- 8:07proof structure which lets you keep
- 8:11nested assumptions and guarantees and
- 8:15initially you can assume um you can have
- 8:18one property that you can guarantee then
- 8:20assume that and prove this property then
- 8:23repeat the process assume this one and
- 8:25prove another property which is a bigger
- 8:27one so if you Nest it like that then
- 8:29you're going to have a uh
- 8:32really uh good advantage in terms of
- 8:34producing the complexity it's one of the
- 8:37really powerful techniques that have
- 8:38come come across I really encourage you
- 8:40to try it out and see how it
- 8:43helps I really hope you enjoyed the
- 8:45video thanks a lot again for watching
- 8:48make sure you subscribe to the channel
- 8:49and never miss an update stay tuned for
- 8:52the next video where I'll cover another
- 8:55fun formication topic see you next time
- 8:58thank you and bye
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