[CS61C FA20] Lecture 21.2 - Pipelining I: Processor Performance Iron Law — Transcript
Full transcript
- 0:01[Music]
- 0:09hello
- 0:10welcome back to 61c module on
- 0:13the measurement and improvement of
- 0:15performance
- 0:16through pipelining
- 0:19so we get some understanding that there
- 0:22are different views of performance
- 0:25and one of the main ways how we measure
- 0:27the performance is the time that it
- 0:29takes to execute a program
- 0:31but there are generally very many
- 0:34parameters that affect that execution
- 0:36time
- 0:37they are very difficult to detangle from
- 0:40each other
- 0:42so we need to break them down down
- 0:44somehow
- 0:46there is something that we call the iron
- 0:49law of processor performance
- 0:51that tells us how long does it take to
- 0:54execute a program
- 0:56based on some of the basic parameters of
- 0:59the machine
- 1:00and the program that is being executed
- 1:03so let's take a look at that in this
- 1:06diagram we have time
- 1:09that is the takes to execute the program
- 1:12simply expanded or this fraction get
- 1:16multiplied and divided by the number of
- 1:18instructions
- 1:19and the number of cycles
- 1:24so time to execute the program is equal
- 1:27to the number of instructions in the
- 1:29program
- 1:30the number of cycles per instruction
- 1:34and time to execute one cycle
- 1:38so this is now a lot easier to break
- 1:42down and understand the fundamental
- 1:44causes or fundamental parameters that
- 1:47affect each of these
- 1:50different programs may have
- 1:53different number of instructions one of
- 1:56the fundamental architectural
- 1:58parameters is the number of cycles that
- 2:01it takes to complete an instruction
- 2:03and finally often
- 2:07processor speed is associated with the
- 2:09time to
- 2:10to execute one cycle or the frequency at
- 2:13which processor runs
- 2:15but none of these parameters can be
- 2:18analyzed alone they all have to be put
- 2:22together
- 2:22to understand that how long does it take
- 2:25to perform a task
- 2:27so let's get into that let's analyze
- 2:30each one
- 2:31of these three basic components number
- 2:34of instructions per program
- 2:36number of cycles per instruction in time
- 2:38to complete a cycle
- 2:40to see how they what affects them
- 2:43and how do they how can they get
- 2:47put together in the end
- 2:51so first one how many does it
- 2:54how many instructions does it take to
- 2:56execute a program
- 2:57well it really depends on what kind of a
- 2:59task are we
- 3:00trying to complete here how is that
- 3:04task coded up for example if we are
- 3:07trying to perform image compression
- 3:10there are um it is very different than
- 3:13try a task of trying to play a game of
- 3:16go um
- 3:18each of these tasks can be implemented
- 3:21by using different algorithms
- 3:23and these algorithms can have vastly
- 3:26different number of instructions that
- 3:27they
- 3:28need to be executed for example
- 3:31things that we have learned in 61a
- 3:34whether it depends as of all then
- 3:37or of n squared matter a lot here
- 3:42then the number of instructions for a
- 3:45program
- 3:46will greatly depend on the programming
- 3:48language some
- 3:49higher level programming language will
- 3:51have languages will have a very
- 3:53compact description of of a task
- 3:56but may blow up to very many assembly
- 3:59instructions it will be much more
- 4:01efficient perhaps to code up this task
- 4:03in assembly
- 4:05but we have seen that already coding up
- 4:08things in assembly is tedious
- 4:10and not everybody is willing to do that
- 4:13especially not for every task that you
- 4:14would like to code up
- 4:17that is tightly combined with the
- 4:19compiler compiler performance and
- 4:21compiler effort
- 4:22some compilers are going to generate
- 4:26assembly level code that has less
- 4:29instructions
- 4:30but some other compilers may
- 4:33generate more instructions and finally
- 4:37it really depends on the isa
- 4:39some isas like most of the risks
- 4:43will require more assembly level
- 4:45instructions than
- 4:46cisc type processors
- 4:50but this cannot be locked in isolation
- 4:53the next metric that is
- 4:55really important is the second component
- 4:57of our iron law
- 4:59which is the average number of clock
- 5:02cycles
- 5:02that it takes to execute one instruction
- 5:06so in some architectures in our
- 5:08architecture we always used one
- 5:10cycle to execute one instruction but in
- 5:11some architectures
- 5:13that number or in some implementations
- 5:15of the same isa
- 5:16that number may vary so the number of
- 5:19clock cycles per instruction depends on
- 5:22the isa
- 5:23but within the isa we can have different
- 5:25processor electric
- 5:27implementations that have different
- 5:30cpi average cpi numbers and if you look
- 5:33at different
- 5:34you know performance measurements
- 5:38you'll find out that different
- 5:40processors from intel
- 5:41have different cpi's among them
- 5:45you know higher class ones versus lower
- 5:47class ones
- 5:48and then different implementations of
- 5:52the x86 architecture
- 5:54may have different cpi's between amd and
- 5:56intel
- 6:00in our case we always used one
- 6:05cycle to execute every instruction so
- 6:06far but that will change
- 6:08um in some cases there will be more
- 6:11complex instructions um
- 6:12at a higher level language or in the
- 6:15assembly language
- 6:16in higher language like string copy in
- 6:19in
- 6:20c is going to take way more than one
- 6:23cycle
- 6:24to copy a string
- 6:27finally we are going to soon see
- 6:30so-called superscalar processors
- 6:32where that cycle average cycle per
- 6:34instruction
- 6:35is much less than one meaning that we
- 6:37are be simultaneously
- 6:39executing multiple instructions in one
- 6:41cycle
- 6:43finally a third component of our law
- 6:46is the time for each cycle
- 6:49or how long does it take to complete the
- 6:53cycle or one over the frequency of a
- 6:54processor
- 6:56this is determined by the
- 6:57microarchitecture you know
- 7:00how many logic gates are
- 7:03in our critical path
- 7:06but it is not just about counting the
- 7:09number of logic gates it is
- 7:11relating the delay of each
- 7:14logic gates to the technology uh
- 7:17an inverter in one technology
- 7:20will be a lot faster than an inverter in
- 7:24a different technology
- 7:26we generally use cmos so inverters in
- 7:29five nanometer technologies
- 7:30are faster than inverters in 28
- 7:33nanometer technologies and much faster
- 7:35than inverters than say
- 7:3690 nanometer cmos technologies when we
- 7:39say
- 7:405 nanometers or um
- 7:4590 nanometers we refer to the minimum
- 7:47features of that technology
- 7:48how short generally a
- 7:52a gate or a wire can be
- 7:55in a particular technology
- 7:58and then finally within the same
- 8:01technology
- 8:01we may have different classes of
- 8:04implementations that have different
- 8:06power budgets for example we will
- 8:09encounter desktop processors that
- 8:11run at clock frequencies that are higher
- 8:14than four gigahertz but they burn
- 8:17in excess of 100 watts on the other hand
- 8:20and
- 8:20and they have um
- 8:23you know so they can run at excess of
- 8:27four gigahertz
- 8:28on the other hand those processors that
- 8:30we'll find in our
- 8:31cell phones will be running at two two
- 8:34and a half gigahertz
- 8:35but they're going to have a lot lower
- 8:38power
- 8:39and that is going to be largely due
- 8:42to the fact that they are often running
- 8:44at a lower supply voltage
- 8:46lower supply voltage as we'll see in the
- 8:49next segment
- 8:50saves us energy but makes things run
- 8:53slower
- 8:55okay let's take a look at the
- 8:58speed trade-off example that puts
- 9:00together these three components of the
- 9:02iron law
- 9:03so this tries to illustrate that just
- 9:06buying a processor based on clock
- 9:09frequency
- 9:10may not always matter you may not get
- 9:13the best machine for the task so for
- 9:16example
- 9:17we have one task that you would like to
- 9:19implement here which is the image
- 9:20compression
- 9:21and that image compression on two
- 9:24processors because they may be in
- 9:25different
- 9:26implemented thing different isas or
- 9:30may be described in a different
- 9:33framework
- 9:33can have different number of
- 9:35instructions that are needed
- 9:37to execute to complete the task to
- 9:38compress the image
- 9:40so for example in processor a we may
- 9:43need
- 9:43just one million instructions and
- 9:45processor b may need
- 9:4650 more may need 1.5 million
- 9:49instructions
- 9:50now when we look at the average cpi
- 9:55processor b may be better because it
- 9:57takes only
- 9:58one cycle to execute an instruction on
- 10:00the average on the other hand
- 10:02processor b takes two and a half cycles
- 10:04to execute that instruction
- 10:06and finally um the clock rate of
- 10:10processor a
- 10:12may be better may it may run at two and
- 10:14a half gigahertz processor b
- 10:15may run at two gigahertz so what's the
- 10:19what is the total execution time well
- 10:21when we multiply all of these together
- 10:22we'll find out that processor b
- 10:24completes the task faster than the
- 10:27processor a
- 10:29although it is
- 10:32worse in two of its performance metrics
- 10:35it takes more
- 10:36instructions to complete the task and it
- 10:39runs at a slower
- 10:41clock rate but it its cpi
- 10:44is significantly better and it helps it
- 10:47overcome the other disadvantages
- 10:51so keep that in mind whenever trying to
- 10:56buy for example a processor
- 11:00we are going to make a quick break here
- 11:02and come back
- 11:03and discuss the energy efficiency
- 11:05because it also
- 11:06affects the performance so see you in a
- 11:09bit
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