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[CS61C FA20] Lecture 19.5 - Single-Cycle CPU Datapath II: Adding JAL — Transcript

by CS 61C Departmental · 650 words · 116 segments · language en · Watch on YouTube

Full transcript

  1. 0:01[Music]
  2. 0:08hi
  3. 0:08welcome back to our design of risk 5 cpu
  4. 0:12this time we'll add support for the jowl
  5. 0:15instruction gel instruction
  6. 0:16is stands for jump and link and is the
  7. 0:20only
  8. 0:20instruction that we have in the j format
  9. 0:23g format
  10. 0:24has a 20 bit wide immediate
  11. 0:28and then for field for a destination
  12. 0:31register and the op code
  13. 0:33it does two updates to the state of the
  14. 0:36processor it saves the value of pc plus
  15. 0:404
  16. 0:41in the destination register so we have
  17. 0:43the return address
  18. 0:45and sets the new value of a program
  19. 0:48counter to be equal to the
  20. 0:50current value of program counter plus
  21. 0:52the offset
  22. 0:53and the offset is set by the immediate
  23. 0:58so it performs a program counter
  24. 1:01relative jump
  25. 1:02where we can jump anywhere that that
  26. 1:05these 20 bits of the immediate allow us
  27. 1:07to do
  28. 1:08um so the target will be anywhere
  29. 1:12within two to plus minus two to the 19
  30. 1:15locations and these locations are said
  31. 1:17to be
  32. 1:17two bytes apart to support the
  33. 1:19compressed instruction set
  34. 1:21which means that we can jump anywhere
  35. 1:23from
  36. 1:24minus 2 to the 18th to plus to the
  37. 1:272 to the 18th 32-bit words
  38. 1:31in our code
  39. 1:35we have all the hardware that we need to
  40. 1:37implement
  41. 1:38jump in link we just need to have a way
  42. 1:41to generate a j
  43. 1:43type immediate so if you look at the
  44. 1:46data path we'll see that we really
  45. 1:49actually have everything we need
  46. 1:51the only update is immediate generation
  47. 1:53has to become
  48. 1:54of j type and j type is similar to a b
  49. 1:57type immediate we just need to add a few
  50. 2:00more
  51. 2:01multiplexers to multiplexing
  52. 2:04more most significant bits the top eight
  53. 2:07significant
  54. 2:08bits so
  55. 2:11when we look at the data path we have
  56. 2:13the two mechanisms that we are
  57. 2:15borrowing from gel
  58. 2:18r and branch to implement jowl
  59. 2:22so the first thing that we need to do
  60. 2:25we need to save the value of pc plus 4
  61. 2:29in the destination register rd we do
  62. 2:32that by using the same mechanism that we
  63. 2:34have added
  64. 2:35for gel r we
  65. 2:39send the pc plus 4 value to the right
  66. 2:42back select register
  67. 2:43right back select is set to have the
  68. 2:46value of 2
  69. 2:47that enables us to write into the
  70. 2:50destination register rd the second
  71. 2:53mechanism we are borrowing from the
  72. 2:55branch
  73. 2:56what we need to do we need to make the
  74. 2:57alu add the value of bc
  75. 3:00at its input a
  76. 3:04with the new immediate value and
  77. 3:07send that result back to the program
  78. 3:09counter we're going to set
  79. 3:11the pc select signal to be always taken
  80. 3:15and that's it let's light up the jowl
  81. 3:18data path
  82. 3:20we start with the instruction fetch and
  83. 3:23we proceed to the decode
  84. 3:26after so few things that i would like to
  85. 3:28highlight here we are sending the pc
  86. 3:31to the a select multiplexer
  87. 3:35and we are sending the pc plus 4 to the
  88. 3:38right back select when we decode the
  89. 3:41instruction
  90. 3:42we set the control bits appropriately
  91. 3:46simultaneously well that will
  92. 3:49generate the immediate that is of a j
  93. 3:52type
  94. 3:53and then we have the right operands in
  95. 3:55front of the alu
  96. 3:56the alu multiplexer inputs are set
  97. 4:00to pick the program counter
  98. 4:03and the immediate and the output of the
  99. 4:06alu
  100. 4:07will be sent back to the pc cell
  101. 4:09multiplexer
  102. 4:11pc cell multiplexer also has a pc plus 4
  103. 4:15but it will not take it because pc
  104. 4:18cell is all signal is always sent set
  105. 4:21to be taken finally we
  106. 4:25just use the right back select
  107. 4:28multiplexer
  108. 4:29to pick pc plus 4 to be written back in
  109. 4:32the destination register rd
  110. 4:35on the next clock tick
  111. 4:38the destination register and the program
  112. 4:40counted there
  113. 4:41are updated to the new values
  114. 4:44and that is it that is what chal does
  115. 4:48see you in a bit with the long
  116. 4:51immediates

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