[CS61C FA20] Lecture 18.4 - Single-Cycle CPU Datapath I: Sub Datapath — Transcript

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1. 0:01[Music]
2. 0:09hey welcome back to risk 5 cpu design
3. 0:12module
4. 0:12we just designed a data path that
5. 0:15supports
6. 0:16register based additions let's see if we
7. 0:19can generalize it a bit
8. 0:21can we perhaps modify it to support
9. 0:24the subtraction so
10. 0:28remember subtraction is an instruction
11. 0:31of the same
12. 0:32r type and it looks very similar it
13. 0:34actually
14. 0:35has the same op code
15. 0:38same place where we use the same fields
16. 0:41where you'll find the destination
17. 0:43registers
18. 0:44rs1 and rs2 source registers and the
19. 0:47same
20. 0:49funct 3 field there is only one
21. 0:51difference that differentiates them
22. 0:53it is in the func 7 field and that is
23. 0:57the instruction bit theory that selects
24. 1:00whether we are doing addition or
25. 1:02subtraction
26. 1:03so let's see what should we do to our
27. 1:05data path
28. 1:06to support subtraction here is our
29. 1:09data path that is capable of doing
30. 1:12register based addition
31. 1:14so we had our our program counter
32. 1:17our adder fixed adder for incrementing
33. 1:21the program counter by four bytes to
34. 1:23point to the next instruction
35. 1:25our instruction memory our register file
36. 1:28and
37. 1:28our alu that alu before was
38. 1:31just an adder but now we need an alu
39. 1:34that is capable of doing
40. 1:36both addition and subtraction and all
41. 1:39what we need to
42. 1:40tell that tail you is to perform
43. 1:42addition or subtraction to support
44. 1:45add or sub instructions and that's all
45. 1:48we're pretty much done so we just need
46. 1:51to be able to do
47. 1:52these two different instructions we need
48. 1:56to provide another control bit and that
49. 1:59control bit in this case
50. 2:01is alu cell that tail you sell if
51. 2:05it is a zero blu will perform addition
52. 2:08if it is
53. 2:09set to 1 it'll perform subtraction
54. 2:15done well we can go one step
55. 2:18beyond from that we can implement all
56. 2:21the other
57. 2:22our format instructions just by having a
58. 2:25capable arithmetic logic unit
59. 2:27so this alu now needs to support all the
60. 2:30instructions that we have
61. 2:32of the r format which are add sub
62. 2:36shift left logical set less than
63. 2:39set less than unsigned xor
64. 2:43s shift write logical
65. 2:46shift right arithmetic or an end and
66. 2:49that's it
67. 2:50we just need to decode the appropriate
68. 2:53function and function fields
69. 2:57and set alu the to perform appropriate
70. 3:01arithmetic or logic operation
71. 3:05that's it let's in the next module see
72. 3:08how we expand this data path
73. 3:10to support another instruction type see
74. 3:12you there