[CS61C FA20] Lecture 11.5 - RISC-V Instruction Formats I: S-Format — Transcript

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1. 0:00[Music]
2. 0:10hi
3. 0:12welcome back to this 5 instruction
4. 0:14encoding we have seen
5. 0:17our formats and i format so far
6. 0:21and we have seen that load instructions
7. 0:23fit nicely into the i format
8. 0:26can we fit store instructions into an
9. 0:29existing
10. 0:30format unfortunately not we need a
11. 0:33special format for the stores
12. 0:36because they use registers differently
13. 0:39remember how the stores work we
14. 0:42have two source registers one
15. 0:46stores the the data one register source
16. 0:49the data they would like to store in the
17. 0:50memory
18. 0:51the other one stores the base pointer
19. 0:54to the memory then we also need an
20. 0:57immediate value
21. 0:58that we're going to add to that base
22. 0:59pointer to form the address where we
23. 1:01would like to
24. 1:02write so this is different than what we
25. 1:06have had before
26. 1:07we need two of our source registers
27. 1:11like we had in the r format
28. 1:15but we don't need this destination
29. 1:16register because
30. 1:18we don't write anything into our
31. 1:20registers we write
32. 1:21into the memory so our instruction
33. 1:24format needs to
34. 1:25have space for the opcode
35. 1:29rs1 and rs2 and the immediate value
36. 1:33and the functory field to support
37. 1:36different kinds of stores
38. 1:39but what is important to notice is that
39. 1:42we always want to keep the
40. 1:45locations of registers
41. 1:48in the same place in our instruction
42. 1:51because those are important we don't
43. 1:53want processors to be looking for
44. 1:55registers all over the place
45. 1:57where are they where are they it's like
46. 1:59in grade scope
47. 2:00where we when we have to put exactly
48. 2:03where to look for
49. 2:04the answers um when they're written
50. 2:07answers uh to the test
51. 2:10so these locations the fields where the
52. 2:14registers are
53. 2:16never move we do move however
54. 2:19the the field where the
55. 2:22immediate values are so in this case the
56. 2:25immediate is
57. 2:26split in between the upper seven
58. 2:30bits and the five bits where
59. 2:33the the rd used to be so it is still a
60. 2:3612-bit immediate
61. 2:37except that it consists of seven upper
62. 2:39bits and
63. 2:40five lower bits again
64. 2:45this is important it looks confusing to
65. 2:48us but we are not the ones that are
66. 2:50important processor is important
67. 2:51processor needs to find
68. 2:53where are its registers very quickly
69. 2:56let's take a look at an example of a
70. 2:59store
71. 3:01so here is an instruction to store a
72. 3:02word
73. 3:04from register x14 into a memory location
74. 3:07that is pointed by the base register x4
75. 3:10and an offset of 8 that is stored as an
76. 3:13immediate value
77. 3:14so we get a new opcode for stores
78. 3:18this is zero one zero zero zero one one
79. 3:21that's a store and we have
80. 3:25a source register rs1
81. 3:28is two that's our base rs2 is our
82. 3:33content and then we need to form our
83. 3:37immediate we need to form our offset out
84. 3:39of the two parts of the immediate
85. 3:41the lower five bits are here they're
86. 3:43going to contain a value of eight
87. 3:45the upper seven bits are in the upper
88. 3:49in the topmost seven bits of the
89. 3:50instruction when we put them together
90. 3:53we get our combined 12-bit offset that
91. 3:55in this case
92. 3:56is plus eight and that's it that's an
93. 4:00an illustrative example of how do does
94. 4:03the store work
95. 4:05there are three types of stores that
96. 4:09risk 5 supports we can store bytes
97. 4:12we can store half words and we can store
98. 4:16words once again bytes are 8 bits wide
99. 4:20half words are 16 bits wide and words
100. 4:23are 32 bits wide
101. 4:27and that is it for
102. 4:30the s type um we will make a break here
103. 4:34you may want to take a few minutes
104. 4:36longer break and we'll return
105. 4:38with a few more formats see you there