[CS61C FA20] Lecture 11.4 - RISC-V Instruction Formats I: Loads — Transcript

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1. 0:00[Music]
2. 0:10hi
3. 0:11welcome back to risk five instruction
4. 0:12formats we have covered
5. 0:14two types of instructions so far the r
6. 0:17type uses the r format with
7. 0:20the two source registers and destination
8. 0:23register
9. 0:24and is used for arithmetic and logic
10. 0:28register to register instructions
11. 0:32the i type uses the i format
12. 0:35that has one source register one
13. 0:37destination register
14. 0:38and the immediate value and it is used
15. 0:40for immediate
16. 0:41arithmetic and logic instructions so
17. 0:44what do we need
18. 0:45to support the loads in risk five
19. 0:48there is only one type of a load that
20. 0:50there is or one
21. 0:52you know multiple load instructions but
22. 0:55of all one type all of them are of one
23. 0:58type
24. 0:59and that type specifies the base
25. 1:01register
26. 1:02and offset with respect to that base
27. 1:04register which is an immediate value
28. 1:07and that points to memory location
29. 1:10and we get a the datum from that memory
30. 1:13opera
31. 1:14location and place in a destination
32. 1:16register
33. 1:17so we have the instruction format that
34. 1:20has rom
35. 1:21for one source register a destination
36. 1:23register
37. 1:25and an immediate we've just covered that
38. 1:28that's our i type or i format
39. 1:32so we don't need a new instruction
40. 1:35format to support the load
41. 1:37we can just use the i type
42. 1:40so here is how how loads look like
43. 1:44they do get a new op code because
44. 1:47they're not really
45. 1:48immediate arithmetic instructions
46. 1:51they are loads we also have used we have
47. 1:54fully populated the the space to
48. 1:58encode instructions of the immediate
49. 2:01type
50. 2:02so we definitely don't need a new op
51. 2:05code
52. 2:06besides the opcode we need to
53. 2:09specify the destination register the
54. 2:12base register
55. 2:14the same opposite as we have had before
56. 2:16of 12 bits
57. 2:17and the functory sets the type
58. 2:21of load that we are going to do
59. 2:24remember we have different kinds of
60. 2:26loads we may be loading a word
61. 2:28or a byte and that byte load may be
62. 2:31unsigned we'll come back to that in a
63. 2:34sec
64. 2:36but essentially it does what it's
65. 2:38supposed to do
66. 2:39so the 12-bit sign immediate is added
67. 2:42to the value of the base register and
68. 2:45then
69. 2:45it points to the memory address the
70. 2:48contents of that memory address is
71. 2:50stored in destination register
72. 2:52so it is the same instruction format
73. 2:55but the operation is very different than
74. 2:58what we had in
75. 2:59um immediate arithmetic
76. 3:04let's take a look at an example here is
77. 3:06a risk 5 assembly instruction
78. 3:08that is load word x14
79. 3:128 with an offset
80. 3:15base pointer is x2 with an offset of 8.
81. 3:18so the op code here is going to be the
82. 3:21op code that corresponds to
83. 3:23the load which is in this case decimal 3
84. 3:26binary 1 1 that is different than
85. 3:29the ones that we had for the immediates
86. 3:32we need to specify
87. 3:34the base register here which is 2 so we
88. 3:36encode the value
89. 3:38of 2 and the
90. 3:41destination register which is 14 that
91. 3:43corresponds to the
92. 3:45x14 that we had in the instruction and
93. 3:47then
94. 3:48we add the immediate value which is plus
95. 3:51eight and the instruction type is
96. 3:54load word zero one zero from the green
97. 3:58sheet
98. 3:58is a load word
99. 4:02as we have seen there are different
100. 4:04types of loads that
101. 4:06we should fit in this format they are
102. 4:09covering
103. 4:10loading bytes loading words and loading
104. 4:13half words
105. 4:14what are our words well we know that the
106. 4:17word
107. 4:18is 32 bits a byte is quarter of a word
108. 4:22it's 8 bits so what is
109. 4:26a half word well it's 16 bits not that
110. 4:29hard to
111. 4:30to to guess and then we have
112. 4:34unsigned versions of load
113. 4:38byte and load half word we don't have an
114. 4:40unsigned
115. 4:41version of load word because we are
116. 4:44taking 32 bits
117. 4:45from a memory location and placing them
118. 4:47into 32 bits
119. 4:49of a register there is nothing to be
120. 4:51extended
121. 4:52um remember how the load bytes work
122. 4:56we take any byte from a memory location
123. 4:59that is in memory
124. 5:00and place it in the least significant
125. 5:03position
126. 5:04and in our register
127. 5:07and then extend its most significant bit
128. 5:11to perform the sign extension
129. 5:15loading half words works exactly the
130. 5:17same way we
131. 5:18place a half word into the lower part of
132. 5:21the
133. 5:22of the of the register and sign extended
134. 5:26load byte unsigned and load half
135. 5:29word unsigned do not perform the
136. 5:34the sign extension and finally one thing
137. 5:37to notice here
138. 5:39um sign extension is an important
139. 5:42thing to notice that we need to do so it
140. 5:46got its separate bit designated bit
141. 5:49in the functory field that's all what we
142. 5:53need to know about
143. 5:54loads this was relatively easy so we're
144. 5:57gonna move on to the next
145. 6:00instruction type in a bit see you there