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Ask the Experts: DDR5 MRDIMMs — Transcript

by Rambus Inc. · 1,630 words · 254 segments · language en · Watch on YouTube

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  1. 0:02[Music]
  2. 0:12welcome everyone Tas the experts I'm Tim
  3. 0:15messy and I am joined today by my memory
  4. 0:18expert John ebley who is the vice
  5. 0:20president of product marketing for our
  6. 0:21memory interface chips at rambus today
  7. 0:24we're going to be talking about
  8. 0:26mrdm hello
  9. 0:28everyone Thanks for joining John so why
  10. 0:31don't we kick it off with what is mrdm
  11. 0:34and what are the benefits uh so Tim mrdm
  12. 0:37is a new ddr5 memory module architecture
  13. 0:41uh that reuses a lineon share of the
  14. 0:43existing ddr5 infrastructure uh in use
  15. 0:47now uh but it does introduce a few new
  16. 0:50important Concepts that can provide huge
  17. 0:52memory bandwidth and capacity
  18. 0:56benefits uh start starting on the
  19. 0:58bandwidth front uh and Mr dim utilizes
  20. 1:02standard ddr5 dram devices uh in a
  21. 1:05configuration that doesn't look uh too
  22. 1:07different from an R
  23. 1:09dim uh but what it does is that pairs of
  24. 1:13or ranks of Damm are simultaneously
  25. 1:17activated and accessed in parallel and
  26. 1:20these data streams are then multiplexed
  27. 1:22together onto signals running twice the
  28. 1:26native Dam
  29. 1:27speed uh so the number of signals
  30. 1:29between between the module and the CPU
  31. 1:31that's all the same no change in the
  32. 1:34standard dim connector but uh the data
  33. 1:37rate per signal and the bandwidth
  34. 1:39available to the CPU per dim slot has
  35. 1:43effectively
  36. 1:44doubled uh the parallel access of these
  37. 1:47dams and the mxing and demuxing of these
  38. 1:50parallel accesses leads to the effective
  39. 1:54bandwidth increase which can now scale
  40. 1:56Beyond uh the native Dam speed
  41. 2:00so uh as an
  42. 2:02example um we could have an mrdm that
  43. 2:05uses standard ddr5 6400 devices and that
  44. 2:10new module would have an equivalent
  45. 2:13bandwidth uh to an RM that utilizes ddr5
  46. 2:1812,800 megatrans for per second
  47. 2:22dams now moving to the the capacity
  48. 2:25front uh the change in protocol to
  49. 2:28address ranks and parallel and the
  50. 2:31physical changes on the module now allow
  51. 2:34for more than two ranks of drams to be
  52. 2:38addressed uh today as R dims and
  53. 2:41standard rcds are defined uh there's not
  54. 2:44a coste effective way to go beyond two
  55. 2:47ranks of
  56. 2:48dams uh with these Mr dim
  57. 2:51changes um we can have a taller dim with
  58. 2:56four to eight ranks of single die
  59. 2:58package Dam or we could have a standard
  60. 3:01size uh dim with four to eight ranks of
  61. 3:04dual die packages and this is a very
  62. 3:07cost-efficient way of increasing the
  63. 3:10capacity for slot in a ddr5
  64. 3:14system in order to reap these benefits a
  65. 3:17CPU must explicitly support mrdm to take
  66. 3:21advantage of these features and we
  67. 3:24expect most server CPUs will in the
  68. 3:26future support mrdm
  69. 3:30so John you mentioned bandwidth and
  70. 3:32capacity and I know in discussions we've
  71. 3:35had in uh previous episodes we talked
  72. 3:38about how for ddr5 rdms brand new
  73. 3:42chipset really to get the bandwidth and
  74. 3:44capacity benefits are we looking at a
  75. 3:47new chipset required for ddr5 Mr DM a
  76. 3:52good question Tim and the answer is
  77. 3:54mostly yes um beyond the CPU support I
  78. 3:58just mentioned uh there are new and
  79. 4:00upgraded components on the module
  80. 4:03necessary to achieve the functionality
  81. 4:06and benefits that I was just talking
  82. 4:07about it um not everything changes The
  83. 4:10Damp components are
  84. 4:12unchanged uh the SPD and thermal sensor
  85. 4:16are the same ones used on RM today so
  86. 4:19that technology is directly
  87. 4:21leveraged uh the two key new components
  88. 4:25are the multiplexing registered clock
  89. 4:27driver or MRC CD and the multiplexing
  90. 4:32data buffer or
  91. 4:34MDB uh so let me start with the the MDB
  92. 4:37uh because it interfaces to the two
  93. 4:40ranks of of dam I mentioned before and
  94. 4:43it does the multiplexing and D
  95. 4:46multiplexing necessary to convert a
  96. 4:4916bit interface running at Native Dam
  97. 4:52speeds to an 8bit interface running at
  98. 4:56twice that
  99. 4:57speed furthermore it provides load
  100. 5:00isolation to the CPU which is a key
  101. 5:03enabler for mrdm to increase the number
  102. 5:06of ranks and overall capacity of the
  103. 5:10module uh these mdbs are located very
  104. 5:13close to the goldfingers of the dim for
  105. 5:17Superior signal integrity and there are
  106. 5:1910 such devices on the module to provide
  107. 5:22the full 80 bit host ddr5
  108. 5:28interface so in order to get full
  109. 5:31utilization of this bandwidth the
  110. 5:33command bandwidth to these parallel
  111. 5:36ranks must be
  112. 5:37maintained the mrcd extend extends the
  113. 5:41typical rcd function to receive an
  114. 5:44inleaf stream of dam commands at twice
  115. 5:48the typical R dim rate it then D
  116. 5:52interleaves the data stream and then
  117. 5:54steers it correctly to its rank specific
  118. 5:58outputs furthermore it now communicates
  119. 6:00with the mdbs to configure them properly
  120. 6:04for read and write burst
  121. 6:07operations U and there's one more
  122. 6:09component I should mention uh you know
  123. 6:12given the parallel activations of dam
  124. 6:14ranks and the additional chips on the
  125. 6:17module uh that have been added to the
  126. 6:19chipset for these features the absolute
  127. 6:22power envelope of the module is higher
  128. 6:24than a typical RM uh therefore a new pic
  129. 6:28the pic 503
  130. 6:30has been defined to comfortably handle
  131. 6:32this amount of power required of such a
  132. 6:35high bandwidth high capacity dim John
  133. 6:39you mentioned the pic 5030 now earlier
  134. 6:41this year your team introduced a family
  135. 6:45of pimix 5000 5010 5020 and 5020 was
  136. 6:50kind of this new flagship the extreme
  137. 6:52current pic how does the pic 5030 compar
  138. 6:55to the compared to that family you've
  139. 6:57introduced
  140. 7:01right right so as we go to these higher
  141. 7:03speeds higher capacities with higher
  142. 7:07support chip content on the module um
  143. 7:10these first generation of server pmix
  144. 7:12are starting to run out of steam with
  145. 7:14regards to their current output at high
  146. 7:17efficiency um the pic 5030 has been
  147. 7:21defined to support all dims through the
  148. 7:24end of life of
  149. 7:25ddr5 so it'll be used on mrdm like I was
  150. 7:29talking about that runs at you know
  151. 7:3112,800 megat transfers per second um and
  152. 7:35it will also be used to support our dims
  153. 7:39running at 8,000 megat transfers per
  154. 7:41second and higher um so we'll we'll kind
  155. 7:44of take these different variants of the
  156. 7:46Gen one pmix server and have a single
  157. 7:49Gen 2 pmix server uh pic um now if we
  158. 7:54look at from a component perspective how
  159. 7:55does the 5030 compare to say a 5020
  160. 8:00um I'll kind of talk about three key
  161. 8:01changes uh one is the addition of two
  162. 8:05output switching Regulators to bring the
  163. 8:07total to six so we're going to four to
  164. 8:10six uh each of those six outputs can
  165. 8:13sustain a DC current of anywhere from
  166. 8:16five up to seven and a half amps uh so
  167. 8:19it can source and provide a lot of
  168. 8:21current uh from the nominal 12vt input
  169. 8:25okay um you know so we have an increased
  170. 8:27number of regulators also how we
  171. 8:30configure those Regulators are more
  172. 8:32flexible in the 5030 um so they can be
  173. 8:36configured into sign single uh dual and
  174. 8:40three-phase
  175. 8:41Regulators um the three-phase regulation
  176. 8:44is new in 530 and this flexibility
  177. 8:47allows for maximum efficiency for each
  178. 8:51particular dim
  179. 8:53type and speaking of that um pic 530
  180. 8:57being used on both our GMS and Mr dims
  181. 9:01when uh when an enduser buys their
  182. 9:04servers do they have to decide at that
  183. 9:07time hey I'm going to use just Mr dims
  184. 9:10or I'm going to use just RDM 8000 on
  185. 9:13this particular
  186. 9:15configuration you know one of the nice
  187. 9:17things about this technology is that it
  188. 9:20can be a drop in
  189. 9:21replacement uh a single motherboard
  190. 9:24designed will support both mrdm and RDM
  191. 9:29and the dim connector is the same and
  192. 9:32the routing
  193. 9:33topology the physical eray the protocol
  194. 9:35erer uh is the same from the host to the
  195. 9:39dim so a user does not need to decide
  196. 9:42when designing their servers or even
  197. 9:45when initially deploying the server as
  198. 9:47they can always come back and upgrade at
  199. 9:49a later time uh this provides a lot of
  200. 9:52flexibility through the life cycle of
  201. 9:54the
  202. 9:56server great so John um when can we
  203. 9:59expect to see servers uh in the market
  204. 10:02that use mrdm 12800 and is there a road
  205. 10:05map uh beyond that
  206. 10:08point we expect servers that would
  207. 10:11utilize mrdm
  208. 10:1412800 uh to be launching and in volume
  209. 10:17in
  210. 10:192026 um and um you know we do Envision
  211. 10:22that similar to R dims which have had
  212. 10:25many ddr5 speed bins uh based on the
  213. 10:28native speed of the D
  214. 10:30devices uh that Mr dim and the chipset
  215. 10:34that enables it it will also be
  216. 10:37multigenerational um these future
  217. 10:39roadmap modules Beyond
  218. 10:4212800 uh will leverage faster underlying
  219. 10:45dams and signaling Innovations in the
  220. 10:48host and our logic chipset to reach
  221. 10:51these even higher speeds and
  222. 10:53capacity John as a final question why
  223. 10:57should customers uh choose rambus memory
  224. 11:00interface
  225. 11:03chips thank you for that question uh
  226. 11:06rambus has been a trusted us-based
  227. 11:08partner and innovator in the memory and
  228. 11:11Signal Integrity space now for over 30
  229. 11:15years uh and over the last 10 of those
  230. 11:17years uh We've really established
  231. 11:19ourselves as a robust supplier of high
  232. 11:23quality semiconductor products that meet
  233. 11:26the market windows for our customers uh
  234. 11:29with the performance and margin that
  235. 11:31exceed the
  236. 11:33specifications rambus is a complete
  237. 11:36supplier of components for memory
  238. 11:37modules
  239. 11:38today uh we have the necessary memory
  240. 11:41subsystem experience to develop fully
  241. 11:45interoperable products and we have the
  242. 11:47tools and the core competency uh to
  243. 11:51quickly help our customers with bring up
  244. 11:53enable and
  245. 11:55qualification of their products in their
  246. 11:58end use case
  247. 12:00environments wonderful John thank you so
  248. 12:02much for your time today and thank you
  249. 12:04everybody for joining us we'll see you
  250. 12:07here again real soon on ask the
  251. 12:10experts it's always a pleasure spending
  252. 12:12time with you Tim thank you and thank
  253. 12:14you for everyone goodbye thank you Gian
  254. 12:25[Music]

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